When designing circuits, the need often arises to generate a supply-independent current bias. A known design of bias circuit is shown in FIG. 1. The arrangement is that described in United Kingdom Patent Application GB No. 2007055. The circuit shown comprises a bias transistor T1, the collector load of which includes a pair of resistors R1, R2, which latter serve as a voltage/current divider. Feedback voltage/current is taken from the junction of the pair of resistors R1, R2 and is applied to the base of the bias transistor T1. The voltage/current, at the collector output of the bias transistor T1, is referred to the base of a drive transistor T2.
The first resistor R1 is connected to the supply voltage rail Vs, and the emitters of the two transistors T1, T2, both NPN type bipolar transistors, are connected to circuit earth. The drive transistor T2 serves thus as a current sink. This bias circuit has a peaked current versus supply voltage characteristic, the characteristic C1 shown in FIG. 3. For practical purposes this bias circuit thus provides current that is reasonably constant over a limited range of supply voltage in the region of the characteristic maximum. The resistor values are chosen so that the range of supply voltage matches the working range of the circuit application, but because of the peaked nature of the characteristic the working range is necessarily much restricted, and applications therefore severely limited. The current value may be scaled by appropriate choice of the ratio of transistor emitter areas.
The PNP inverse of the above circuit is also known, and may be employed as a current source.
To provide current constancy over a wider range of supply voltage, it is also known to cascade the NPN bias circuit and its PNP inverse as shown in FIG. 2. See also the article entitled "Optimum Design of Two Cascaded Peaking Current Sources" by V. Gheorgiu et al., IEEE Journal of Solid-State Circuits, Vol SC-16 No. 4 August 1981 pages 415-417, in which cascading is described. The circuit of figure comprises a PNP bias circuit including a bias transistor T1', a pair of collector load and base feedback resistors R1', R2' and a drive transistor T2'. This circuit is cascaded to the NPN circuit of FIG. 1 just described, the drive transistor T2' replacing the first resistor R1. This circuit has a twin-peaked characteristic--characteristic C2 shown in FIG. 3. Although this has an improved response, the peaking can be most pronounced when the circuit is overcompensated, and great care therefore must be taken in selecting the circuit components.